The feature of this project is the hardware implementation of noise removing algorithm using VHDL in spartan2 FPGA family. there are many projects developed for this kind of application as part of software. This project implements the process as FPGA core. The image files with noise are fed to the FPGA device through parallel port. This data is stored in BLOCK RAM of Spartan 2 device then it is being processed by pixel by pixel and then noises are removed and replaced by suitable derived pixels. Then these pixel values are transferred through parallel port to the host system and stored as image file using matlab.

Applications: Multiunit manual recording using median filter recording display was much improved and impulse identification was made easier.

This is concerned with the construction of the gold code generator. The basic functional blocks for gold code generator are LFSR's. Different codes are given to different users both in the transmitter end as well as in the receiver end. The digital data given by the different user are embedded with their respective codes and they are sent through a single channel with same frequency and time. At the receiver part the respective codes recover the original data sent by the different users.

Application: mobile communication